Philips 74F198
The 74F198 Bidirectional Universal Shift Register is designed to incorporate virtually all of the features a system designer may want in a shift register. This circuit features parallel inputs and outputs, shift right and shift left serial inputs, operating mode select inputs, and direct overriding master reset input. The register has four distinct modes of operation: – Parallel (broadside) load – Shift right (in the direction Q0 toward Q7) – Shift left (in the direction Q7 toward Q0) – Inhibit clock (do nothing).FEATURES
● Buffered clock and control inputs● Shift right, shift left, and parallel load capability
● Asynchronous Master Reset
DESCRIPTION
Synchronous parallel loading is accomplished by applying the 8 bits of data and taking both mode control inputs, S0 and S1, High. The data is loaded into the associated flip-flop and appears at the outputs after the positive transition of the clock inputs. During loading, serial data flow is inhibited. Shift right is accomplished synchronously, with the rising edge of the clock pulse when S0 is High and S1 is Low. Serial data for this mode is entered at the right data input (DSR). When S0 is Low and S1 is High, data shifts left synchronously and new data is entered at the shift-left serial input (DSL). Clocking of the flip-flops is inhibited when both mode control inputs are Low. PIN CONFIGURATION S0 1 DSR D0 Q0 D1 Q1 D2 Q2 D3 2 3 4 5 6 7 8 9 24 VCC 23 S1 22 DSL 21 D7 20 Q7 19 D6 18 Q6 17 D5 16 Q5 15 D4 14 Q4 13 MR Q3 10 CP 11 GND 12 SF00160 TYPE...