P24C512B-D8H Datasheet | Puya Semiconductor

Description The P24C512B is a 512-Kbit I2C-patible Serial EEPROM (Electrically Erasable Programmable Memory) device. It contains a memory array of 64 K × 8 bits, which is organized in 128-byte per page. P24C512B provides the following devices for different application. Device Selection Table Device Name Voltage Range P24C512B -D8H 1.7V~5.5V Temp. Range -40°C ~ 85°C Max. Clock Frequency 1MHz Features - Single Supply Voltage and High Speed - Minimum operating voltage down to 1.7V - 1 MHz clock from 1.7V to 5.5V - 400k Hz clock from 1.7V to 2.5V - Low power CMOS technology - Read current 500u A, maximum - Write current 2.5m A, maximum - Schmitt Trigger, Filtered Inputs for Noise Suppression - Sequential & Random Read Features - 128 byte Page Write Modes, Partial Page Writes Allowed - Write protect of the whole memory array - Additional Write Lockable Page - Self-timed Write Cycle (5ms maximum) - High Reliability - Endurance: 4 Million Write Cycles - Data Retention: 200 Years - HBM: 6KV - Latch up Capability: +/- 200m A - Package - 8-balls WLCSP 1/16 1. Pin Configuration 1.1 Pin Configuration Figure 1-1 Pin Configuration P24C512B-D8H Datasheet Rev.1.0 1.2 Pin Definition Table 1-1 Pin Definition Pin...