P24C512B_Auto Datasheet | Puya Semiconductor

Description The P24C512B is I2C-patible Serial EEPROM (Electrically Erasable Programmable Memory) Automotive grade device operating up to 125°C. The P24C512B contains a memory array of 512 Kbits (64 Kbytes), which is organized in 128 bytes per page. It is pliant with the Automotive standard AEC-Q100 grade 1. Features - AEC-Q100 qualified - Single Supply Voltage and High Speed - Minimum operating voltage down to 1.7 V - 400k Hz/1MHz clock from 1.7V to 5.5 V - Low power CMOS technology - Read current 0.3 m A (400 k Hz, typical) - Write current 1.0 m A (400 k Hz, typical) - Schmitt Trigger, Filtered Inputs for Noise Suppression - Sequential & Random Read Features - 128 bytes Page Write Modes, Partial Page Writes Allowed - Write protect of the whole memory array - Additional Write Lockable Page - Self-timed Write Cycle (5ms maximum) - High Reliability - Endurance: 1 Million Write Cycles - Data Retention: 100 Years - HBM: 6 k V - Latch up Capability: +/-200 m A - Package: SOP8, TSSOP8, UDFN8 1/19 P24C512B_Auto Datasheet Rev.1.1 1. Pin Configuration 1.1 Pin Configuration Figure 1-1 Pin Configuration E0 1 E1 2 E2 3 Vss 4 P24C512B 7 WCB 6 SCL 5 SDA 1.2 Pin Definition Table 1-1 Pin...