853S202 Overview
The 853S202 is a 12:2 Differential-to-LVPECL Clock Multiplexer which can operate up to 3GHz. The 853S202 has twelve selectable differential clock inputs, any of which can be independently routed to either of the two LVDS outputs. The CLKx, nCLKx input pairs can accept LVPECL or LVDS levels.
853S202 Key Features
- High speed 12.2 differential multiplexer
- Two differential 3.3V or 2.5V LVPECL outputs
- Twelve selectable differential clock or data inputs
- CLKx, nCLKx pairs can accept the following differential input
- Maximum output frequency: 3GHz
- Propagation delay: 1.15ns (maximum)
- Input skew: 150ps (maximum)
- Output skew: 50ps (maximum)
- Part-to-part skew: 250ps (maximum)
- Additive phase jitter, RMS: 0.114ps (typical) @ 155.52MHz, 3.3V