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ICS8752 - LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

General Description

The ICS8752 is a low voltage, low skew LVCMOS clock generator.

With output frequencies up to 240MHz, the ICS8752 is targeted for high performance clock applcations.

Key Features

  • Fully integrated PLL.
  • Eight LVCMOS outputs, 7Ω typical output impedance.
  • Selectable LVCMOS CLK0 or CLK1 inputs for redundant clock.

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Datasheet Details

Part number ICS8752
Manufacturer Renesas
File Size 376.70 KB
Description LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
Datasheet download datasheet ICS8752 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ICS8752 LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER GENERAL DESCRIPTION The ICS8752 is a low voltage, low skew LVCMOS clock generator. With output frequencies up to 240MHz, the ICS8752 is targeted for high performance clock applcations. Along with a fully integrated PLL, the ICS8752 contains frequency configurable outputs and an external feedback input for regenerating clocks with “zero delay”. Dual clock inputs, CLK0 and CLK1, support redundant clock applications. The CLK_SEL input determines which reference clock is used. The output divider values of Bank A and B are controlled by the DIV_SELA0:1, and DIV_SELB0:1, respectively. For test and system debug purposes, the PLL_SEL input allows the PLL to be bypassed.