Description
- 72 Ld QFN, LVDS Mode
PIN NUMBER 1, 2, 17, 57, 58, 59, 60 9, 10, 19, 20, 21, 70, 71, 72
5, 8, 11, 14 27, 32, 62 26, 45, 61, 65
3 4 6, 7 12, 13
LVDS PIN NAME DNC AVDD AVSS OVDD OVSS
NAPSLP VCM
VINBP, VINBN VINAN, VINAP
LVDS PIN FUNCTION Do Not Connect 1.8V Analog Supply Analog Ground 1.8V Output
Features
- Single Supply 1.8V Operation.
- Clock Duty Cycle Stabilizer.
- 75fs Clock Jitter.
- 700MHz Bandwidth.
- Programmable Built-in Test Patterns.
- Multi-ADC Support
- SPI Programmable Fine Gain and Offset Control - Support for Multiple ADC Synchronization - Optimized Output Timing.
- Nap and Sleep Modes - 200µs Sleep Wake-up Time.
- Data Output Clock.
- DDR LVDS-Compatible or LVCMOS Outputs.
- User-accessible Digital Temperatur.
ISLA222P Datasheet
