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KAD5512HP - 12-Bit ADC

Description

- 72 Ld QFN

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Features

  • Pin-compatible with the KAD5512P Family, offering 2.2dB higher SNR.
  • Programmable gain, offset and skew control.
  • 950MHz analog input bandwidth.
  • 60fs Clock jitter.
  • Over-range indicator.
  • Selectable clock divider: ÷1, ÷2 or ÷4.
  • Clock phase selection.
  • Nap and sleep modes.
  • Two’s complement, gray code or binary data format.
  • DDR LVDS-compatible or LVCMOS outputs.
  • Programmable built-in test patterns.

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Datasheet preview – KAD5512HP

Datasheet Details

Part number KAD5512HP
Manufacturer Renesas
File Size 1.70 MB
Description 12-Bit ADC
Datasheet download datasheet KAD5512HP Datasheet
Additional preview pages of the KAD5512HP datasheet.
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Full PDF Text Transcription

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DATASHEET KAD5512HP High Performance 12-Bit, 250/210/170/125MSPS ADC FN6808 Rev 4.00 May 31, 2016 The KAD5512HP is the high performance member of the KAD5512 family of 12-bit analog-to-digital converters. Designed with Intersil’s proprietary FemtoCharge™ technology on a standard CMOS process, the family supports sampling rates of up to 250MSPS. The KAD5512HP is part of a pin-compatible portfolio of 10, 12 and 14-bit A/Ds with sample rates ranging from 125MSPS to 500MSPS. A Serial Peripheral Interface (SPI) port allows for extensive configurability, as well as fine control of various parameters such as gain and offset. Digital output data is presented in selectable LVDS or CMOS formats. The KAD5512HP is available in 72 and 48 Ld QFN packages with an exposed paddle. Operating from a 1.
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