Renesas Electronics KAD5512P
The KAD5512P is the low-power member of the KAD5512 family of 12-bit analog-to-digital converters. Designed with Intersil’s proprietary FemtoCharge™ technology on a standard CMOS process, the family supports sampling rates of up to 250MSPS. The KAD5512P is part of a pin-compatible portfolio of 10, 12 and 14-bit A/Ds with sample rates ranging from 125MSPS to 500MSPS.FEATURES
● Half the power of the pin-compatible KAD5512HP family● 1.5GHz analog input bandwidth
● 60fs clock jitter
● Programmable gain, offset and skew control
● Over-range indicator
● Selectable clock divider: ÷1, ÷2 or ÷4
● Clock phase selection
● Nap and sleep modes
● Two’s complement, gray code or binary data format
● SDR/DDR LVDS-compatible or LVCMOS outputs
● Programmable built-in test patterns
● Single-supply 1.8V operation
● Pb-free (RoHS compliant)
APPLICATIONS
● Power amplifier linearization● Radar and satellite antenna array processing
● Broadband communications
● High-performance data acquisition
● Communications test equipment
● WiMAX and microwave receivers AVDD CLKDIV OVDD CLKP CLKN VINP VINN VCM CLOCK GENERATION CLKOUTP CLKOUTN SHA 1.25V + – 12-BIT 250 MSPS ADC SPI CONTROL DIGITAL ERROR CORRECTION LVDS/CMOS DRIVERS D[11:0]P D[11:0]N ORP ORN OUTFMT OUTMODE NAPSLP AVSS CSB SCLK SDIO SDO OVSS FIGURE 1. BLOCK DIAGRAM FN6807 Rev 5.00 May 31, 2016 0 AIN = -1.0dBFS SNR = 66.0dBFS -20 SFDR = 86.5dBc SINAD = 65.9dBFS -40 AMPLITUDE (dBFS) -60 -80 -100 -120 0 20 40 60 80 100 120 FREQUENCY (MHz) FIGURE 2.