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RL78I1D - MCU

Features

  • Ultra-low power consumption technology.
  • VDD = 1.6 V to 3.6 V.
  • HALT mode.
  • STOP mode.
  • SNOOZE mode RL78 CPU core.
  • CISC architecture with 3-stage pipeline.
  • Minimum instruction execution time: Can be changed from high speed (0.04167 s: @ 24 MHz operation with high-speed on-chip oscillator) to ultra-low speed (66.6 s: @ 15 kHz operation with low-speed on-chip oscillator clock).
  • Multiply/divide/multiply & accumulate instructions are suppo.

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Datasheet preview – RL78I1D

Datasheet Details

Part number RL78I1D
Manufacturer Renesas
File Size 0.99 MB
Description MCU
Datasheet download datasheet RL78I1D Datasheet
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Full PDF Text Transcription

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RL78/I1D RENESAS MCU 1. OUTLINE 1.1 Features Ultra-low power consumption technology • VDD = 1.6 V to 3.6 V • HALT mode • STOP mode • SNOOZE mode RL78 CPU core • CISC architecture with 3-stage pipeline • Minimum instruction execution time: Can be changed from high speed (0.04167 s: @ 24 MHz operation with high-speed on-chip oscillator) to ultra-low speed (66.6 s: @ 15 kHz operation with low-speed on-chip oscillator clock) • Multiply/divide/multiply & accumulate instructions are supported. • Address space: 1 MB • General-purpose registers: (8-bit register  8)  4 banks • On-chip RAM: 0.
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