MS90C104 Overview
The MS90C104 receiver is designed to support pixel data transmission between Host and Flat Panel Display from NTSC up to SXGA resolutions. The MS90C104 converts the LVDS data streams back into 35bits of CMOS/TTL data with the choice of the rising edge or falling edge clock for the convenience with a variety of LCD panel controllers. At a transmit clock frequency of 175Mhz, 30bits of GRB data and 5bits of timing and...
MS90C104 Key Features
- Clock range：8-175MHz
- Narrow bus reduces cable size
- Single 3.3V supply
- Power-down Mode
- Supports VGA、SVGA、XGA、SXGA
- Up to 6.125Gbps throughput
- Up to 765.6Megabytes/sec bandwidth
- PLL requires no external ponents
- patible with TIA/EIA-644 LVDS standard
- TQFP64 Package