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MS90C104
MS90C104
——+3.3V 175MHz 30bits COLOR LVDS Receiver
General Description
The MS90C104 receiver is designed to support pixel data transmission between Host and Flat Panel Display from NTSC up to SXGA resolutions. The MS90C104 converts the LVDS data streams back into 35bits of CMOS/TTL data with the choice of the rising edge or falling edge clock for the convenience with a variety of LCD panel controllers. At a transmit clock frequency of 175Mhz, 30bits of GRB data and 5bits of timing and control data (HSYNC,VSYCN,DE,CNTL1,CNTL2) are transmitted at an effective rate of 1225Mbps per LVDS channel. Using a 175MHz clock, the data throughput is 765.6Mbytes/sec.
Features
Clock range：8-175MHz Narrow bus reduces cable size Single 3.
MS90C104 Datasheet
