Datasheet Details
| Part number | M74HC113 |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 247.83 KB |
| Description | DUAL J-K FLIP FLOP WITH PRESET |
| Datasheet | M74HC113_STMicroelectronics.pdf |
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Overview: M54HC113 M74HC113 DUAL J-K FLIP FLOP WITH PRESET . . . . . . . . HIGH SPEED fMAX = 71 MHz (TYP.) at VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.
| Part number | M74HC113 |
|---|---|
| Manufacturer | STMicroelectronics |
| File Size | 247.83 KB |
| Description | DUAL J-K FLIP FLOP WITH PRESET |
| Datasheet | M74HC113_STMicroelectronics.pdf |
|
|
|
The M54/74HC113 is a high speed CMOS DUAL JK FLIP FLOP WITH PRESET fabricated in silicon gate C2MOS technology.
It has the same high speed performance of LSTTL bined with true CMOS low power consumption.
This circuit offers individual J, K, set, and clock inputs.
| Part Number | Description |
|---|---|
| M74HC11 | TRIPLE 3-INPUT AND GATE |
| M74HC112 | DUAL J-K FLIP FLOP WITH PRESET AND CLEAR |
| M74HC10 | TRIPLE 3-INPUT NAND GATE |
| M74HC107 | DUAL J-K FLIP FLOP |
| M74HC131 | 3 TO 8 LINE DECODER/LATCH |
| M74HC132 | QUAD 2-INPUT SCHMITT NAND GATE |
| M74HC133 | 13 INPUT NAND GATE |
| M74HC137 | 3 TO 8 LINE DECODER/LATCH INVERTING |
| M74HC138 | 3 TO 8 LINE DECODER INVERTING |
| M74HC139 | DUAL 2 TO 4 DECODER/DEMULTIPLEXER |