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STPIC6A259 - POWER LOGIC 8-BIT ADDRESSABLE LATCH

Datasheet Summary

Description

This power logic 8-bit addressable latch controls open-drain DMOS transistor outputs and is designed for general-purpose storage applications in digital systems.

Specific uses include working registers, serial-holding registers, and decoders or demultiplexers.

Features

  • an independent chopping current-limiting circuit to prevent damage in the case of a short circuit. Four distinct modes of operation are selectable by controlling the clear (CLR) and enable (G) inputs and enumerated in the function table. In the addressable-latch mode, data at the data-in (D) terminal is written into the addressed latch. The addressed DMOS-transistor output inverts the data input with all unadressed DMOS-transistor output remaining in their previuous state. In the MOS-transistor.

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Datasheet Details

Part number STPIC6A259
Manufacturer STMicroelectronics
File Size 294.70 KB
Description POWER LOGIC 8-BIT ADDRESSABLE LATCH
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Full PDF Text Transcription

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www.DataSheet4U.com STPIC6A259 POWER LOGIC 8-BIT ADDRESSABLE LATCH PRELIMINARY DATA s s s s s s s LOW RDS(on): 1Ω TYP OUTPUT SHORT-CIRCUIT PROTECTION 75mJ AVAILANCHE ENERGY EIGHT 350mA DMOS OUTPUTS 50V SWITCHING CAPABILITY FOUR DISTINCT FUNCTION MODES LOW POWER CONSUMPTION SOP DESCRIPTION This power logic 8-bit addressable latch controls open-drain DMOS transistor outputs and is designed for general-purpose storage applications in digital systems. Specific uses include working registers, serial-holding registers, and decoders or demultiplexers. This is a multifunctional device capable of operating as eight addressable latches or an 8-line demultiplexer with active-low DMOS outputs.
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