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M53230800DW0 - (M532308x0DB0/DW0) DRAM Module

This page provides the datasheet information for the M53230800DW0, a member of the M53230800DB0 (M532308x0DB0/DW0) DRAM Module family.

Datasheet Summary

Description

The Samsung M5323080(1)0D is a 8Mx32bits Dynamic RAM high density memory module.

The Samsung M5323080(1)0D consists of sixteen CMOS 4Mx4bits DRAMs in 24-pin SOJ package mounted on a 72-pin glass-epoxy substrate.

Features

  • Part Identification - M53230800DW0-C(4096 cycles/64ms Ref, SOJ, Solder) - M53230800DB0-C(4096 cycles/64ms Ref, SOJ, Gold) - M53230810DW0-C(2048 cycles/32ms Ref, SOJ, Solder) - M53230810DB0-C(2048 cycles/32ms Ref, SOJ, Gold).
  • Extended Data Out.
  • CAS-before-RAS refresh capability.
  • RAS-only and Hidden refresh capability.
  • TTL compatible inputs and outputs.
  • Single +5V±10% power supply.

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Datasheet preview – M53230800DW0

Datasheet Details

Part number M53230800DW0
Manufacturer Samsung Semiconductor
File Size 427.36 KB
Description (M532308x0DB0/DW0) DRAM Module
Datasheet download datasheet M53230800DW0 Datasheet
Additional preview pages of the M53230800DW0 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com DRAM MODULE M53230800DW0/DB0 & M53230810DW0/DB0 EDO Mode 8M x 32 DRAM SIMM using 4Mx4, 4K/2K Refresh, 5V GENERAL DESCRIPTION The Samsung M5323080(1)0D is a 8Mx32bits Dynamic RAM high density memory module. The Samsung M5323080(1)0D consists of sixteen CMOS 4Mx4bits DRAMs in 24-pin SOJ package mounted on a 72-pin glass-epoxy substrate. A 0.1 or 0.22uF decoupling capacitor is mounted on the printed circuit board for each DRAM. The M5323080(1)0D is a Single In-line Memory Module with edge connections and is intended for mounting into 72 pin edge connector sockets.
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