Datasheet Summary
Preliminary
K4S510732B CMOS SDRAM
Stacked 512Mbit SDRAM
16M x 8bit x 4 Banks Synchronous DRAM LVTTL
..
Revision 0.0 Feb. 2001
- Samsung Electronics reserves the right to change products or specification without
Rev. 0.0 Feb.2001
Preliminary
K4S510732B CMOS SDRAM
Revision 0.0 (Feb., 2001)
Rev. 0.0 Feb.2001
Preliminary
16M x 8Bit x 4 Banks Synchronous DRAM
Features
- JEDEC standard 3.3V power supply
- LVTTL patible with multiplexed address
- Four banks operation
- MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)
- All inputs are sampled at the positive going edge...