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K4S560832A - 256Mbit SDRAM 8M x 8bit x 4 Banks Synchronous DRAM LVTTL

Download the K4S560832A datasheet PDF. This datasheet also covers the K4S variant, as both devices belong to the same 256mbit sdram 8m x 8bit x 4 banks synchronous dram lvttl family and are provided as variant models within a single manufacturer datasheet.

General Description

The K4S560832A is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 8,392,608 words by 8 bits, fabricated with SAMSUNG's high performance CMOS technology.

Key Features

  • JEDEC standard 3.3V power supply.
  • LVTTL compatible with multiplexed address.
  • Four banks operation.
  • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave).
  • All inputs are sampled at the positive going edge of the system clock.
  • Burst read single-bit write operation.
  • DQM for masking.
  • Auto & self refresh.
  • 64ms refresh period (8K Cycle.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (K4S-560832.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
K4S560832E-UC75 SDRAM 256Mb E-die Samsung
K4S560432E-UC75 SDRAM 256Mb E-die Samsung
K4S561632C 256Mbit SDRAM Samsung
K4S561632E-UC60 SDRAM 256Mb E-die Samsung
K4S561632E-UC75 SDRAM 256Mb E-die Samsung

Other Datasheets by Samsung Semiconductor

Part Number Description
K4S560832B 256Mbit SDRAM 8M x 8bit x 4 Banks Synchronous DRAM LVTTL
K4S560832C 256Mbit SDRAM 8M x 8bit x 4 Banks Synchronous DRAM LVTTL
K4S560832D 256Mbit SDRAM 8M x 8bit x 4 Banks Synchronous DRAM LVTTL
K4S560832E-NC75 SDRAM 256Mb E-die
K4S560832E-NCL75 SDRAM 256Mb E-die

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
K4S560832A CMOS SDRAM 256Mbit SDRAM 8M x 8bit x 4 Banks Synchronous DRAM LVTTL Revision 0.0 Sep. 1999 * Samsung Electronics reserves the right to change products or specification without notice. Rev. 0.0 Sep. 1999 K4S560832A 8M x 8Bit x 4 Banks Synchronous DRAM FEATURES • JEDEC standard 3.3V power supply • LVTTL compatible with multiplexed address • Four banks operation • MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) • All inputs are sampled at the positive going edge of the system clock.