Datasheet4U Logo Datasheet4U.com

K7I163682B - (K7I163682B / K7I161882B) 1Mx18-bit DDRII CIO b2 SRAM

General Description

Input Clock Input Clock for Output Data Output Echo Clock DLL Disable when low Burst Count Address Inputs Address Inputs Data Inputs Outputs Read, Write Control Pin, Read active when high Synchronous Load Pin, bus Cycle sequence is to be defined when low Block Write Control Pin,active when low Input

Key Features

  • 1.8V+0.1V/-0.1V Power Supply.
  • DLL circuitry for wide output data valid window and future freguency scaling.
  • I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/-0.1V for 1.8V I/O.
  • Pipelined, double-data rate operation.
  • Common data input/output bus.
  • HSTL I/O.
  • Full data coherency, providing most current data.
  • Synchronous pipeline read with self timed late write.
  • Registered address, control and data inp.

📥 Download Datasheet

Full PDF Text Transcription for K7I163682B (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for K7I163682B. For precise diagrams, and layout, please refer to the original PDF.

K7I163682B K7I161882B Document Title 512Kx36 & 1Mx18 DDRII CIO b2 SRAM 512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM Revision History Rev. No. 0.0 0.1 History 1. Initial docum...

View more extracted text
CIO b2 SRAM Revision History Rev. No. 0.0 0.1 History 1. Initial document. 1. Add the speed bin (-33, -30) 2. Delete the speed bin (-25, -13) 1. Change the Boundary scan exit order. 2. Correct the Overshoot and Undershoot timing diagram. 1. Add the speed bin (-25) 1. Correct the JTAG ID register definition 2. Correct the AC timing parameter (delete the tKHKH Max value) 1. Change the Maximum Clock cycle time. 2. Correct the 165FBGA package ball size. 1. Add the power up/down sequencing comment. 2. Update the DC current parameter (Icc and Isb). 3. Change the Max. speed bin from -33 to -30. 1. Change the ISB1. Speed Bin -30 -

More Datasheets from Samsung Semiconductor

Part Number Description
K7I163684B 512Kx36 & 1Mx18 DDRII CIO b4 SRAM
K7I161882B (K7I163682B / K7I161882B) 1Mx18-bit DDRII CIO b2 SRAM
K7I161884B 512Kx36 & 1Mx18 DDRII CIO b4 SRAM
K7I321882M 1Mx36 & 2Mx18 DDRII CIO b2 SRAM
K7I323682M 1Mx36 & 2Mx18 DDRII CIO b2 SRAM
K7I641882M (K7I643682M / K7I641882M) 72Mb M-die DDRII SRAM Specification 165 FBGA
K7I641884M (K7I641884M / K7I643684M) 72Mb DDRII SRAM Specification
K7I643682M (K7I643682M / K7I641882M) 72Mb M-die DDRII SRAM Specification 165 FBGA
K7I643684M (K7I641884M / K7I643684M) 72Mb DDRII SRAM Specification