Samsung semiconductor KM48S8030D
The KM48S8030D is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 8 bits, fabricated with SAMSUNG′s high performance CMOS technology.| Part No. | KM48S8030D |
|---|---|
| Datasheet | KM48S8030D Download |
| Manufacturer |  Samsung semiconductor |
| Description | 64Mbit SDRAM 2M x 8Bit x 4 Banks Synchronous DRAM LVTTL |
| Buy | Stock & Price |
FEATURES
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● JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Burst read single-bit write operation DQM for masking Auto & self refresh 64ms refresh period (4K Cycle) CMOS SDRAM
GENERAL DESCRIPTION
Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.●
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● ORDERING INFORMATION Part No. KM48S8030DT-G/FA KM48S8030DT-G/F8 KM48S8030DT-G/FH KM48S8030DT-G/FL Max Freq. 133MHz(CL=3) 125MHz(CL=3) 100MHz(CL=2) 100MHz(CL=3) LVTTL 54 TSOP(II) Interface Package FUNCTION...
