Datasheet4U Logo Datasheet4U.com

KM718V887 - 256Kx18 Synchronous SRAM

General Description

The KM718V887 is a 4,718,592 bit Synchronous Static Random Access Memory designed for support zero wait state performance for advanced Pentium/Power PC address pipelining.

And with CS1 high, ADSP is blocked to control signal.

Key Features

  • Synchronous Operation.
  • On-Chip Address Counter.
  • Write Self-Timed Cycle.
  • On-Chip Address and Control Registers.
  • VDD= 3.3V+0.3V/-0.165V Power Supply.
  • VDDQ Supply Voltage 3.3V+0.3V/-0.165V for 3.3V I/O or 2.5V+0.4V/-0.125V for 2.5V I/O.
  • 5V Tolerant Inputs except I/O Pins.
  • Byte Writable Function.
  • Global Write Enable Controls a full bus-width write.
  • Power Down State via ZZ Signal.
  • Asynchronou.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
KM7101 4.9MHz Rail-to-Rail I/O Amplifier Fairchild Semiconductor
KM702 Sensor MEGATRON
KM7660 Voltage Converter Kexin

Other Datasheets by Samsung Semiconductor

Part Number Description
KM718V847 128Kx36 & 256Kx18 Flow-Through NtRAM
KM718V849 128Kx36 & 256Kx18 Pipelined NtRAM
KM718V089 512Kx36 & 1Mx18 Synchronous SRAM
KM718V987 256Kx36 & 512Kx18 Synchronous SRAM
KM718FV4021 128Kx36 & 256Kx18 Synchronous Pipelined SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
KM718V887 Document Title 256Kx18-Bit Synchronous Burst SRAM 256Kx18 Synchronous SRAM Revision History Rev. No. 0.0 0.1 History Initial draft Modify power down cycle timing & Interleaved read timing, Insert Note 4 at AC timing characteristics. Change ISB1 value from 10mA to 30mA. Change ISB2 value from 10mA to 20mA. Change Undershoot spec from -3.0V(pulse width≤20ns) to -2.0V(pulse width≤tCYC/2) Add Overshoot spec 4.6V((pulse width≤tCYC/2) Change VIH max from 5.5V to VDD+0.5V Draft Date May. 15. 1997 February. 11. 1998 Remark Preliminary Preliminary 0.2 April. 14. 1998 Preliminary 0.3 May 13. 1998 Change ISB2 value from 20mA to 30mA. Change VDD condition from VDD=3.3V+10%/-5% to VDD=3.3V+0.3V/-0.165V. Final spec Release Add VDDQ Supply voltage( 2.5V ) May 15. 1998 Dec. 02.