• Part: SI53106
  • Description: SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER
  • Manufacturer: Silicon Labs
  • Size: 1.28 MB
Download SI53106 Datasheet PDF
Silicon Labs
SI53106
SI53106 is SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER manufactured by Silicon Labs.
SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER Features - Six 0.7 V low-power, push-pull, - Low phase jitter (Intel QPI, PCIe HCSL-patible PCIe Gen 3 Gen 1/2/3/4 mon clock outputs pliant - Individual OE HW pins for each - Gen 3 SRNS pliant output clock - PLL or bypass mode - 100 MHz /133 MHz PLL - Spread spectrum tolerable - operation, supports PCIe and QPI PLL bandwidth SW SMBUS programming overrides the latch - - - value from HW pin 1.05 to 3.3 V I/O supply voltage 50 ps output-to-output skew Industrial Temperature: - 40 to 85 °C - SMBus address configurable to allow multiple buffers in a single - - 40-pin QFN For higher output devices or control...