SI53112 - DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER

Product Overview

Silicon Laboratories

Part number	SI53112
Manufacturer	Silicon Laboratories
File Size	1.33 MB
Description	DB1200ZL 12-OUTPUT PCIE GEN 3 BUFFER
Datasheet	SI53112 Datasheet
Additional preview pages of the SI53112 datasheet.

The Si53112 is a low-power, 12-output, differential clock buffer that meets all of the performance requirements of the Intel DB1200ZL specification.

Twelve 0.7 V low-power, push-.
PLL or bypass mode pull, HCSL-compatible.
Spread spectrum tolerable PCIe Gen 3 outputs.
1.05 to 3.3 V I/O supply voltage.
Individual OE HW pins for each output clock 100 MHz /133 MHz PLL operation, supports PCIe and QPI.
50 ps output-to-output skew 50 ps cyc-cyc jitter (PLL mode) Low phase jitter (Intel QPI, PCIe Gen 1/2/3/4 common clock compliant).
PLL bandwidth SW SMBUS programming overrides the lat.

📁 Similar Datasheet

Other Datasheets by Silicon Laboratories

Published: Mar 4, 2016 |