SI5327 Description
The Si5327 is a jitter-attenuating precision clock multiplier for applications requiring sub 1 ps jitter performance. The Si5327 accepts two input clocks ranging from 2 kHz to 710 MHz and generates two output clocks ranging from 2 kHz to 808 MHz. The two outputs are divided down separately from a mon source.
SI5327 Key Features
- Generates any frequency from 2 kHz
- Dual clock inputs with manually
- Free run and VCO freeze modes
- Ultra-low jitter clock outputs with jitter
- Support for ITU G.709 and custom
- Integrated loop filter with selectable
- LOL and LOS alarm outputs
- I2C or SPI programmable
- Meets OC-192 GR-253-CORE jitter
- Single 1.8, 2.5, 3.3 V supply
SI5327 Applications
- Dual clock outputs with