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monolithic dual
H
n-channel JFETs Performance Curves NQT See Sedion 4
designed for • • •
• Very High Input Impedance DiHerential Amplifiers
Electrometers
• Impedance Converters
BENEFITS
• High Input Impedance IG = 0.1 pA Maximum (U421-3)
• High Gain gfs = 140 !,mho Minimum@ ID= 3O I'A (U421·3)
• Low Power Supply Operation VGS(off) = 2 V Maximum (U421·3)
• Minimum System Error and Calibration 10 mV Maximum Offset
90 dB Minimum CMRR (U421, U424)
ABSOLUTE MAXIMUM RATINGS (25°C)
TO·78
See Section 5
Gate-to-Gate Voltage Gate-Drain or Gate-Source Voltage Gate Current Device Dissipation (Each Side), TA = 25°C
(Derate 3.2 mW;oC to 150°C) .
- Total Device Dissipation, TA = 25°C
! (Derate 6.
J424 Datasheet
