XD010-24S-D2F Datasheet | Sirenza Microdevices

Description Sirenza Microdevices’ XD010-24S-D2F 12W power module is a robust 2stage Class A/AB amplifier module for use in the driver stages of CDMA RF power amplifiers. The power transistors are fabricated using Sirenza’s latest, high performance LDMOS process. This unit operates from a single voltage and has internal temperature pensation of the bias voltage to ensure consistant performance over the full temperature range. It is internally matched to 50 ohms. 1930-1990 MHz Class A/AB 12W CDMA Driver Amplifier Functional Block Diagram Stage 1 Stage 2 Product Features Temperature pensation Temperature pensation - - - - - - - 4 5 50 W RF impedance 12W Output P1d B Single Supply Operation : Nominally 28V High Gain: 28 d B at 1960 MHz High Efficiency: 26% at 1960 MHz Advanced, Xe MOS LDMOS II FETS Temperature pensation RF in VD1 VD2 Case Flange = Ground RF out - - - - Applications Base Station PA driver Repeater CDMA GSM / EDGE Key Specifications Symbol Frequency P1d B Gain Gain Flatness IRL Efficiency Parameter Frequency of Operation Output Power at 1d B pression Gain at 1W Output Power Peak to Peak Gain Variation, 1930-1990MHz Input Return Loss 1W Output Power, 1930-1990MHz Drain Efficiency at 10W CW output Drain Efficiency at 2W CDMA (Single Carrier IS-95, 9 Ch Fwd) Drain Efficiency at 1W CDMA (Single Carrier IS-95, 9 Ch Fwd) ACPR at 1W CDMA Power Output (Single Carrier IS-95, 9 Ch Fwd, Offset=750KHz, ACPR Integrated Bandwidth) Linearity ALT-1 at 2W CDMA (Single Carrier IS-95, 9 Ch Fwd, Offset=1980 KHz, ACPR Integrated Bandwidth) 3rd Order IMD at 10W PEP (Two Tone; 1MHz) Delay Phase Linearity RTH, j-l RTH, j-2 Signal Delay from Pin 1 to Pin 5 Deviation from Linear Phase (Peak to Peak) Thermal Resistance Stage 1 (Junction to Case) Thermal Resistance Stage 2 (Junction to Case) Unit MHz W d B d B d B % % % d B d B d Bc n S Deg ºC/W ºC/W -27 10 20 Min. 1930 10 26 12 28 0.4 14 26 12 6.5 -58 -70 -32 2.9 0.5 11 4 1.0 Typ. Max. 1990 Test Conditions: Zin = Zout...