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CXK77V3211Q-12 - 32768-word by 32-bit High Speed Synchronous Static RAM

Datasheet Summary

Description

The CXK77V3211Q is a 32K × 32 high performance synchronous SRAM with a 2-bit burst counter and output register.

All synchronous inputs pass through register controlled by a positive-edge-triggered single clock input (CLK).

Features

  • Fast address access times and High frequency operation Symbol -12 -14 Flow-through Access 12ns 14ns Cycle 60MHz 50MHz Pipeline Access 7ns 8ns Cycle 75MHz 66MHz.
  • 5V tolerant inputs except I/O pins.
  • A FT pin for pipelined or flow-thru architecture.
  • A LBO mode pin as burst control pin (i486/Pentium™ and Linear burst sequence).
  • Single +3.3V +10%.
  • 5% power supply.
  • Common data inputs and data outputs.
  • All inputs and outputs are.

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Datasheet preview – CXK77V3211Q-12

Datasheet Details

Part number CXK77V3211Q-12
Manufacturer Sony Corporation
File Size 569.98 KB
Description 32768-word by 32-bit High Speed Synchronous Static RAM
Datasheet download datasheet CXK77V3211Q-12 Datasheet
Additional preview pages of the CXK77V3211Q-12 datasheet.

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Full PDF Text Transcription

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CXK77V3211Q -12/14 32768-word by 32-bit High Speed Synchronous Static RAM For the availability of this product, please contact the sales office. Description The CXK77V3211Q is a 32K × 32 high performance synchronous SRAM with a 2-bit burst counter and output register. All synchronous inputs pass through register controlled by a positive-edge-triggered single clock input (CLK). The synchronous inputs include all addresses, all data inputs, chip enable (CE), two additional chip enables for easy depth expansion (CE2, CE2), burst control inputs (ADSC, ADSP, ADV), four individual byte write enables (BW1, BW2, BW3, BW4), one byte write enable (BWE), and global write enable (SGW). Asynchronous inputs include the output enable (OE) and power down control (ZZ).
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