DESCRIPTION
PIN CONFIGURATION SOP-8 FEATURE 60V/10.0A, RDS(ON) = 30mΩ (Typ.) @VGS = 10V 60V/6.0A, RDS(ON) = 35mΩ @VGS = 4.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOP-8 package design MARKING Y: Year Code A: Porduce Code P: Process Code 1 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2007, Stanson Corp. STN4828 2008. V1 STN4828 Dual N Channel Enhancement Mode MOSFET 10.0A ABSOULTE MAXIMUM RATINGS
(Ta = 25℃ Unless otherwise noted ) Parameter Symbol Drain-Source Voltage VDSS Gate-Source Voltage Continuous Drain Current (TJ=150℃) TA=25℃ TA=70℃ Pulsed Drain Current Continuous Source Current (Diode Conduction) Power Dissipation TA=25℃ TA=70℃ Operation Junction Temperature VGSS ID IDM IS PD TJ Storgae Temperature Range TSTG Thermal Resistance-Junction to Ambient RθJA Typical 60 ±20 10.0 6.0 30 10 2.5 1.6 -55/150 -55/150 80 Unit V V A A A W ℃ ℃ ℃/W 2 120 Bentley Square, Mountain View, Ca 94040 USA Copyright © 2007, Stanson Corp.