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THC63LVDM83R - (THC63LVDM63R / THC63LVDM83R) Reduced Swing LVDS 24-Bit / 18-Bit Color Host LCD Panel Interface

General Description

The THC63LVDM83R transmitter converts 28bits of CMOS/TTL data into LVDS (Low Voltage Differential Signaling) data stream.

A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link.

Key Features

  • 28:4 Data channel compression at up to 298 Megabytes per sec throughput.
  • Wide dot clock range: 20-85MHz suited for VGA,.
  • Support Reduced swing LVDS for Low EMI.
  • 200mV swing LVDS/350mV swing LVDS.
  • selectable Support Spread Spectrum Clock Generator On chip Input Jitter Filtering PLL requires No external components Single 3.3V supply with 125mW(TYP) Power-Down Mode Low prof.

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Datasheet Details

Part number THC63LVDM83R
Manufacturer THine Electronics
File Size 415.86 KB
Description (THC63LVDM63R / THC63LVDM83R) Reduced Swing LVDS 24-Bit / 18-Bit Color Host LCD Panel Interface
Datasheet download datasheet THC63LVDM83R Datasheet

Full PDF Text Transcription for THC63LVDM83R (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for THC63LVDM83R. For precise diagrams, and layout, please refer to the original PDF.

www.DataSheet4U.com THC63LVDM83R/THC63LVDM63R_Rev2.0 THC63LVDM83R/THC63LVDM63R REDUCED SWING LVDS 24Bit/18Bit COLOR HOST-LCD PANEL INTERFACE General Description The THC63...

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Bit/18Bit COLOR HOST-LCD PANEL INTERFACE General Description The THC63LVDM83R transmitter converts 28bits of CMOS/TTL data into LVDS (Low Voltage Differential Signaling) data stream. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. At a transmit clock frequency of 85MHz, 28bits of RGB data and 4bits of LCD timing and control data (HSYNC, VSYNC, CNTL1, CNTL2) are transmitted at a rate of 595Mbps per LVDS channel. Also available is THC63LVDM63R that converts 21bits of CMOS/TTL data into LVDS(Low Voltage Differential Signaling) data stream.

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