SSM3K72CFS Datasheet | Toshiba

Features (1) ESD protected gate (2) Low drain-source on-resistance : RDS(ON) = 2.8 Ω (typ.) (@VGS = 10 V) RDS(ON) = 3.1 Ω (typ.) (@VGS = 5.0 V) RDS(ON) = 3.2 Ω (typ.) (@VGS = 4.5 V) 3. Packaging and Internal Circuit 1: Gate 2: Source 3: Drain ©2016 Toshiba Corporation Start of mercial production 2016-02 2016-11-17 Rev.3.0 4. Absolute Maximum Ratings (Note) (Unless otherwise specified, Ta = 25 ) Characteristics Symbol Rating Unit Drain-source voltage Gate-source voltage Drain current (DC) Drain current (pulsed) Power dissipation Power dissipation (Note 1) (Note 1), (Note 2) (Note 3) (Note 4) VDSS VGSS ID IDP PD ±20 170 m A 150 m W Channel temperature Storage temperature Tch  Tstg -55 to 150 Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook ("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Ensure that the channel temperature does not exceed 150 . Note 2: Pulse width ≤ 10 µs, Duty ≤ 1 % Note 3: Device mounted on a 25.4 mm × 25.4 mm × 1.6 mm FR4 glass epoxy board (Cu pad: 0.36 mm2 × 3) Note 4: Device mounted on a 25.4 mm × 25.4 mm × 1.6 mm FR4 glass epoxy board (Cu pad: 645 mm2) Note: Note: Note: This transistor is sensitive to electrostatic discharge and should be handled with care. The MOSFETs in this device are sensitive to electrostatic discharge. When handling this device, the worktables, operators, soldering irons and other objects should be protected against anti-static discharge. The...