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TH58NYG3S0HBAI4 Datasheet 8 Gbit (1g X 8 Bit) CMOS Nand E2prom

Manufacturer: Toshiba

Overview: TH58NYG3S0HBAI4 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 8 GBIT (1G  8 BIT) CMOS NAND.

General Description

The TH58NYG3S0HBAI4 is a single 1.8V 8 Gbit (9,126,805,504 bits) NAND Electrically Erasable and Programmable Read-Only Memory (NAND E2PROM) organized as (4096  256) bytes  64 pages  4096blocks.

The device has two 4352-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 4352-byte increments.

The Erase operation is implemented in a single block unit (256 Kbytes  16 Kbytes: 4352 bytes  64 pages).

Key Features

  • Organization Memory cell array Register Page size Block size x8 4352  128K  8  2 4352  8 4352 bytes (256K  16K) bytes.
  • Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Program, Multi Block Erase, Multi Page Copy, Multi Page Read.
  • Mode control Serial input/output Command control.
  • Number of valid blocks Min 4016 blocks Max 4096 blocks.
  • Power supply VCC  1.7V to 1.95V.
  • Access time Cell array to register 25 s max.

TH58NYG3S0HBAI4 Distributor

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