TQ8033 Datasheet | TriQuint Semiconductor

Features 33 6-Bit Program Latches - >1.5 Gb/s/port data rate >50 Gb/s aggregate bandwidth 5:32 Decoder MONITOR_LD OADD(0:4) - Differential PECL data path with 64 inputs and 33 outputs - Non-blocking architecture supports Broadcast and Multicast operation - Data inputs internally biased for AC coupling - Low jitter and signal skew - Double-buffered configuration latches - TTL configuration control inputs The TQ8033 is a non-blocking 64 x 33 digital crosspoint switch that supports data rates greater than 1.5 gigabits per second per channel. The TQ8033's non-blocking architecture allows any bination of output-to-input programming, supporting both broadcast and multicast applications. Using 33 independent 64:1 multiplexers, each output channel can be programmed to any input without restriction or degradation of signal fidelity. The TQ8033's architecture is ideally suited for building larger switch arrays. By eliminating the need to "wire-or" or buss the outputs to interconnect multiple devices, the maximum system bandwidth and signal fidelity is achived. Designed for use in high-performance / high-capacity switching applications, the TQ8033 data path is fully differential to minimize jitter, skew, and signal distortion. The data path interface levels are PECL and the configuration and control interface levels are TTL. The TQ8033 is the ideal switching solution for HDTV digital video, data munications (Fibre Channel and Gigabit Ethernet) and telemunications applications. - 304-pin BGA package - Single +5V supply Applications - Tele/data switching including Fibre Channel and Gigabit Ethernet - Hubs and routers - Video switching including High-Definition TV (HDTV) For additional information and latest specifications, see our website: .triquint. DATA SHEET Circuit Description Data Inputs The 64 data input channels are differential PECL patible. All inputs have a 2.5KΩ Thevenin equivalent bias circuit which holds the DC bias at VDD-1.3 Volts...