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TQ8033 - 1.5 Gbit/sec 64x33 Expandable Crosspoint Switch

General Description

Data Inputs The 64 data input channels are differential PECL compatible.

All inputs have a 2.5KΩ Thevenin equivalent bias circuit which holds the DC bias at VDD-1.3 Volts simplifying the design of applications requiring AC coupling.

Input signals must be properly terminated for maximum performance.

Key Features

  • 33 6-Bit Program Latches.
  • >1.5 Gb/s/port data rate >50 Gb/s aggregate bandwidth 5:32 Decoder MONITOR_LD OADD(0:4) TQ8033.
  • Differential PECL data path with 64 inputs and 33 outputs.
  • Non-blocking architecture supports Broadcast and Multicast operation.
  • Data inputs internally biased for AC coupling.
  • Low jitter and signal skew.
  • Double-buffered configuration latches.
  • TTL configuration control inputs The TQ8033 is a non-blocking 64 x.

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Datasheet Details

Part number TQ8033
Manufacturer TriQuint Semiconductor
File Size 559.56 KB
Description 1.5 Gbit/sec 64x33 Expandable Crosspoint Switch
Datasheet download datasheet TQ8033 Datasheet

Full PDF Text Transcription for TQ8033 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for TQ8033. For precise diagrams, and layout, please refer to the original PDF.

T R I Q U I N T S E M I C O N D U C T O R , I N C . TQ8033 DATA SHEET D0–D63 128 Input Buffers 64 x 33 Crosspoint Switch Matrix Output Buffers O0–O32 66 1.5 Gbit/sec 64x3...

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33 Crosspoint Switch Matrix Output Buffers O0–O32 66 1.5 Gbit/sec 64x33 Expandable Crosspoint Switch SWITCHING PRODUCTS CONFIGURE 33 6-Bit Configuration Latches RESETIN LOAD IADD(0:5) Features 33 6-Bit Program Latches • >1.