TQ8103 - 622 Mb/s Clock & Data Recovery

The TQ8103 CDR integrates separate detectors for acquiring frequency lock and maintaining precise phase lock.

When the CDR is locked onto an incoming NRZ data stream, its phase-detect circuitry compares the phase of the incoming NRZ data and the phase of the generated 622.08 MHz clock.

• Single-chip CDR circuit for 622 Mb/s data.
• Exceeds Bellcore and ITU jitter tolerance maps.
• Single-ended ECL input has loopthrough path for external 50 ohm termination to minimize stubs and reflections.
• Clock and data outputs are differential ECL.
• Provides complete high-speed OC-12/STM-4 solution when used with TQ8101 or TQ8105 Mux/Demux/Framer/PLL.
• External loop filter requires simple passive network.
• Maintains clock in absence of d.