Description
This SiC FET device is based on a unique ‘cascode’ circuit configuration, in which a normally-on SiC JFET is co-packaged with a Si MOSFET to produce a normally-off SiC FET device.
Features
- w On-resistance RDS(on): 150mW (typ) w Operating temperature: 175°C (max) w Excellent reverse recovery: Qrr = 67nC w Low body diode VFSD: 1.46V w Low gate charge: QG = 25.7nC w Threshold voltage VG(th): 4.4V (typ) allowing 0 to 15V drive w Package creepage and clearance distance > 6.1mm w Kelvin source pin for optimized switching performance w ESD protected, HBM class 2
Typical.
UF3C120150B7S Datasheet
