Datasheet4U Logo Datasheet4U.com

SiSD4112LDN - N-Channel 100V MOSFET

Features

  • TrenchFET® Gen IV power MOSFET.
  • Very low RDS x Qg figure-of-merit (FOM).
  • Source flip technology, enhance thermal performance.
  • 100 % Rg and UIS tested.
  • Material categorization: for definitions of compliance please see www. vishay. com/doc?99912.

📥 Download Datasheet

Datasheet preview – SiSD4112LDN

Datasheet Details

Part number SiSD4112LDN
Manufacturer Vishay
File Size 280.14 KB
Description N-Channel 100V MOSFET
Datasheet download datasheet SiSD4112LDN Datasheet
Additional preview pages of the SiSD4112LDN datasheet.

📁 Similar Datasheet

  • SISD0600ED120i20 - ED-Type phase leg IGBT module (SwissSEM)
  • SIS0100 - Black and White Image Sensor Camera Module (Sanyo Semicon Device)
  • SiS1057 - JFET Operational Amplifier (Silicon Supplies)
  • SIS23C128 - 16K x 8 CMOS Mask ROM (Silicon Integrated Systems)
  • SIS23C128A - 16K x 8 CMOS Mask ROM (Silicon Integrated Systems)
  • SIS23C256 - CMOS MASK ROM (ETC)
  • SIS23C256A - CMOS MASK ROM (ETC)
  • SIS23C32 - (SIS23C32 / SIS23C33) 4K x 8 CMOS MASK ROM (Silicon Integrated Systems)
  • SIS23C32A - (SIS23C32 / SIS23C33) 4K x 8 CMOS MASK ROM (Silicon Integrated Systems)
  • SIS23C33 - (SIS23C32 / SIS23C33) 4K x 8 CMOS MASK ROM (Silicon Integrated Systems)
Other Datasheets by Vishay

Full PDF Text Transcription

Click to expand full text
www.vishay.com SiSD4112LDN Vishay Siliconix N-Channel 100 V (D-S) MOSFET 3.3 mm PowerPAK® 1212-F D 5 D 6 D 7 D 8 G 1 3.3 mm Top View PRODUCT SUMMARY VDS (V) RDS(on) max. () at VGS = 10 V RDS(on) max. () at VGS = 4.5 V Qg typ. (nC) ID (A) Configuration 1 4 S 3 S 2 S S Bottom View 100 0.012 0.0145 18 44 a Single FEATURES • TrenchFET® Gen IV power MOSFET • Very low RDS x Qg figure-of-merit (FOM) • Source flip technology, enhance thermal performance • 100 % Rg and UIS tested • Material categorization: for definitions of compliance please see www.vishay.
Published: |