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WED2ZLRSP01S Datasheet

Dual Array Synchronous Pipeline Burst Nbl Sram

Manufacturer: White Electronic

Datasheet Details

Part number WED2ZLRSP01S
Manufacturer White Electronic
File Size 376.33 KB
Description Dual Array Synchronous Pipeline Burst NBL SRAM
Datasheet WED2ZLRSP01S_WhiteElectronic.pdf

WED2ZLRSP01S Overview

The WED2ZLRSP01S, Dual Independent Array, NBLSSRAM device employs high-speed, Low-Power CMOS silicon and is fabricated using an advanced CMOS process. WEDC’s 24Mb, Sync Burst SRAM MCP integrates two totally independent arrays, the first organized as a 512K x 32, and the second a 256K x 32. All Synchronous inputs pass through registers controlled by a positive edge triggered, single clock input per array.

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