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XC95288 - XC95288 In-System Programmable CPLD

Datasheet Summary

Features

  • 15 ns pin-to-pin logic delays on all pins.
  • fCNT to 95 MHz.
  • 288 macrocells with 6,400 usable gates.
  • Up to 166 user I/O pins.
  • 5V in-system programmable - Endurance of 10,000 program/erase cycles - Program/erase over full commercial voltage and temperature range.
  • Enhanced pin-locking architecture.
  • Flexible 36V18 Function Block - 90 product terms drive any or all of 18 macrocells within Function Block - Global and product term clocks, o.

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Datasheet Details

Part number XC95288
Manufacturer Xilinx
File Size 99.08 KB
Description XC95288 In-System Programmable CPLD
Datasheet download datasheet XC95288 Datasheet
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Product Obsolete/Under Obsolescence 0 R XC95288 In-System Programmable CPLD DS069 (v5.0) May 17, 2013 05 Features • 15 ns pin-to-pin logic delays on all pins • fCNT to 95 MHz • 288 macrocells with 6,400 usable gates • Up to 166 user I/O pins • 5V in-system programmable - Endurance of 10,000 program/erase cycles - Program/erase over full commercial voltage and temperature range • Enhanced pin-locking architecture • Flexible 36V18 Function Block - 90 product terms drive any or all of 18 macrocells within Function Block - Global and product term clocks, output enables, set and reset signals • Extensive IEEE Std 1149.
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