ZL50019
Features
- 2048 channel x 2048 channel non-blocking digital Time Division Multiplex (TDM) switch at 8.192 and 16.384 Mbps or using a bination of ports running at 2.048, 4.096, 8.192 and 16.384 Mbps 32 serial TDM input, 32 serial TDM output streams Integrated Digital Phase-Locked Loop (DPLL) exceeds Telcordia GR-1244-CORE Stratum 4E specifications Output clocks have less than 1 ns of jitter (except for the 1.544 MHz output) DPLL provides holdover, freerun and jitter attenuation features with four independent reference source inputs Exceptional input clock cycle to cycle variation tolerance (20 ns for all rates)
- - Ordering Information ZL50019GAC 256-ball PBGA ZL50019QCC 256-lead LQFP -40° C to +85 ° C Output streams can be configured as bidirectional for connection to backplanes Per-stream input and output data rate conversion selection at 2.048, 4.096, 8.192 or 16.384 Mbps. Input and output data rates can differ Per-stream high impedance control outputs (STOHZ) for 16 output streams...
