74AC11373 Datasheet | Texas Instruments

description This 8-bit latch features 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches of the 74AC11373 are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. OE can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance third state and increased drive provide the capability to drive bus lines in a bus-organized system without need for interface or pullup ponents. OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are off. The 74AC11373 is characterized for operation from - 40°C to 85°C. FUNCTION TABLE (each latch) INPUTS OE LE OUTPUT Q L HH LLX HXX Q0 Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1996, Texas Instruments Incorporated - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 74AC11373 OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS213A - MAY 1987 - REVISED APRIL 1996 logic symbol† 24 OE 13 LE 23 1D 22 2D 21 3D 20 4D 17 5D 16 6D 15 7D 14 8D EN...