74AC11379 Datasheet | Texas Instruments

description These circuits are positive-edge-triggered D-type flip-flops with a clock-enable input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the clock-enable input (CLKEN) is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the data (D) input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the clock-enable (CLKEN) input. The 74AC11379 is characterized for operation from - 40°C to 85°C. FUNCTION TABLE (each flip-flop) INPUTS OUTPUTS CLKEN CLK D Q Q H X X Q0 Q0 L ↑HHL L ↑LLH X L X Q0 Q0 EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 Copyright  1993, Texas Instruments Incorporated 1 74AC11379 QUAD D-TYPE FLIP-FLOP WITH CLOCK ENABLE SCAS104 - MARCH 1990 - REVISED APRIL 1993 logic symbol† logic diagram (positive logic) CLKEN CLK 19 12 18 1D 17 2D 14 3D 13 4D G1 1C2 2D 20 1Q 1 1Q 2 2Q 3 2Q 8 3Q 9 3Q 10 4Q 11 4Q † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 19 CLKEN 12 CLK 18...