ADC12DJ5200-SP
ADC12DJ5200-SP is RF-Sampling Analog-to-Digital Converter manufactured by Texas Instruments.
Features
- Radiation Tolerance:
- Total Ionizing Dose (TID): 300 krad (Si)
- Single Event Latchup (SEL): 120 Me V-cm2/mg
- Single Event Upset (SEU) immune registers
- ADC core:
- 12-bit resolution
- Up to 10.4 GSPS in single-channel mode
- Up to 5.2 GSPS in dual-channel mode
- Performance specifications:
- Noise floor (- 20 d BFS, VFS = 1 VPP-DIFF):
- Dual-channel mode:
- 151.8 d BFS/Hz
- Single-channel mode:
- 154.4 d BFS/Hz
- ENOB (dual channel, FIN = 2.4 GHz): 8.6 Bits
- Buffered analog inputs with VCMI of 0 V:
- Analog input bandwidth (- 3 d B): 8 GHz
- Usable input frequency range: > 10 GHz
- Full-scale input voltage (VFS, default): 0.8 VPP
- Noiseless aperture delay (t AD) adjustment:
- Precise sampling control: 19-fs Step
- Simplifies synchronization and interleaving
- Temperature and voltage invariant delays
- Easy-to-use synchronization features
:
- Automatic SYSREF timing calibration
- Time stamp for sample marking
- JESD204C serial data interface:
- Maximum lane rate: 17.16 Gbps
- Support for 64b/66b and 8b/10b encoding
- 8b/10b modes are JESD204B patible
- Optional digital down-converters (DDC):
- 4x, 8x, 16x and 32x plex decimation
- Four independent 32-Bit NCOs per DDC
- Peak RF Input Power (Diff): +26.5 d Bm (+ 27.5 d BFS, 560x fullscale power)
- Programmable FIR filter for equalization
- Power consumption: 4 W
- Power supplies: 1.1 V, 1.9 V
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