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ADS6222 - Analog-to-Digital Converters

General Description

ADS6225/ADS6224/ADS6223/ADS6222 (ADS622X) is a family of high performance 12-bit 125/105/80/65 MSPS dual channel A-D converters.

Serial LVDS data outputs reduce the number of interface lines, resulting in a compact 48-pin QFN package (7 mm × 7 mm) that allows for high system integration density.

Key Features

  • 1.
  • Maximum Sample Rate: 125 MSPS.
  • 12-Bit Resolution with No Missing Codes.
  • Simultaneous Sample and Hold.
  • 3.5 dB Coarse Gain and up to 6 dB Programmable Fine Gain for SFDR/SNR TradeOff.
  • Serialized LVDS Outputs with Programmable Internal Termination Option.
  • Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Amplitude Down to 400 mVpp.
  • Internal Reference with External Reference Support.
  • No External Decoupling Required for Ref.

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Other Datasheets by Texas Instruments

Part Number Description
ADS6223 Analog-to-Digital Converters
ADS6224 Analog-to-Digital Converters
ADS6225 Analog-to-Digital Converters
ADS6242 Analog-to-Digital Converters
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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ADS6225, ADS6224 ADS6223, ADS6222 www.ti.com SLAS543B – MAY 2007 – REVISED JANUARY 2014 DUAL CHANNEL, 12-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS INTERFACE Check for Samples: ADS6225, ADS6224, ADS6223, ADS6222 FEATURES 1 • Maximum Sample Rate: 125 MSPS • 12-Bit Resolution with No Missing Codes • Simultaneous Sample and Hold • 3.5 dB Coarse Gain and up to 6 dB Programmable Fine Gain for SFDR/SNR TradeOff • Serialized LVDS Outputs with Programmable Internal Termination Option • Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Amplitude Down to 400 mVpp • Internal Reference with External Reference Support • No External Decoupling Required for References • 3.