AM67 Datasheet | Texas Instruments

Features Processor Cores: - Up to Quad 64-bit Arm® Cortex®-A53 microprocessor subsystem at up to 1.4GHz - Quad-core Cortex-A53 cluster with 512KB L2 shared cache with SECDED ECC - Each A53 core has 32KB L1 DCache with SECDED ECC and 32KB L1 ICache with Parity protection - Single-core Arm® Cortex®-R5F at up to 800MHz, integrated as part of MCU Channel with FFI - 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories - 512KB SRAM with SECDED ECC - Single-core Arm® Cortex®-R5F at up to 800MHz, integrated to support Device Management - 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories - Single-core Arm® Cortex®-R5F at up to 800MHz, integrated to support Run-time Management - 32KB ICache, 32KB L1 DCache, and 64KB TCM with SECDED ECC on all memories - Two Deep Learning Accelerators (up to 4 TOPS total), each with: - C7x floating point, up to 40 GFLOPS, 256-bit Vector DSP at up to 1.0GHz - Matrix Multiply Accelerator (MMA), up to 2 TOPS (8b) at up to 1.0GHz - 32KB L1 DCache with SECDED ECC and 64KB L1 ICache with Parity protection - 2.25MB of L2 SRAM with SECDED ECC - Depth and Motion Processing Accelerators (DMPAC) - Dense Optical Flow (DOF) Accelerator - Stereo Disparity Engine (SDE) Accelerator - Vision Processing Accelerators (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators: - 600MP/s ISP - Support for 12-bit RGB-IR - Support for up to 16-bit input RAW format - Line support up to 4096 - Wide Dynamic Range (WDR), Lens Distortion Correction (LDC), Vision Imaging Subsystem (VISS), and Multi-Scalar (MSC) support - Output color format : 8-bits, 12-bits, and YUV 4:2:2, YUV 4:2:0, RGB, HSV/HSL Multimedia: - Display subsystem - Triple display support over OLDI/LVDS (1x OLDI-DL, 1x or 2x OLDI-SL), DSI or DPI - OLDI-SL (Single Link): up to 1920 x 1080 at 60fps (165-MHz Pixel Clock) - OLDI-DL (Dual Link): up to 3840 x 1080 at 60fps (150-MHz Pixel Clock) - MIPI® DSI: with 4 Lane MIPI® D-PHY supports up to...