Download CDCS504-Q1 Datasheet PDF
CDCS504-Q1 page 2
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CDCS504-Q1 page 3
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CDCS504-Q1 Description

The CDCS504-Q1 device is a LVCMOS input clock buffer with selectable frequency multiplication. The CDCS504-Q1 has an output enable pin. The device accepts a 3.3-V LVCMOS signal at the input.

CDCS504-Q1 Key Features

  • 1 Qualified for Automotive

CDCS504-Q1 Applications

  • AEC-Q100 Test Guidance With the Following
  • Device Temperature Grade 2: -40°C to 105°C