DS90LV110AT Overview
Description
DS90LV110A is a 1 to 10 data/clock distributor utilizing LVDS (Low Voltage Differential Signaling) technology for low power, high speed operation. Data paths are fully differential from input to output for low noise generation and low pulse width distortion.
Key Features
- 2 Low jitter 400 Mbps fully differential data path
- 145 ps (typ) of pk-pk jitter with PRBS = 223-1 data pattern at 400 Mbps
- Single +3.3 V Supply
- Balanced output impedance
- Output channel-to-channel skew is 35ps (typ)
- Differential output voltage (VOD) is 320mV (typ) with 100Ω termination load
- LVDS receiver inputs accept LVPECL signals
- LVDS input failsafe
- Fast propagation delay of 2.8 ns (typ)
- Receiver open, shorted, and terminated input failsafe
