DS90LV110T Overview
DS90LV110 is a 1 to 10 data/clock distributor utilizing LVDS (Low Voltage Differential Signaling) technology for low power, high speed operation. Data paths are fully differential from input to output for low noise generation and low pulse width distortion. The design allows connection of 1 input to all 10 outputs.
DS90LV110T Key Features
- 2 Low jitter 800 Mbps fully differential data path
- 145 ps (typ) of pk-pk jitter with PRBS = 223-1
- Single +3.3 V Supply
- Less than 413 mW (typ) total power dissipation
- Balanced output impedance
- Output channel-to-channel skew is 35ps (typ)
- Differential output voltage (VOD) is 320mV (typ)
- LVDS receiver inputs accept LVPECL signals
- Fast propagation delay of 2.8 ns (typ)
- Receiver input threshold < ±100 mV
