LMK5C33216 - Ultra-Low Jitter Clock Synchronizer

Product Overview

Texas Instruments

Datasheet Details

Part number	LMK5C33216
Manufacturer	Texas Instruments
File Size	4.20 MB
Description	Ultra-Low Jitter Clock Synchronizer
Datasheet	LMK5C33216 Datasheet
Additional preview pages of the LMK5C33216 datasheet.

Product details

Description

The LMK5C33216 is a high-performance network clock generator, synchronizer, and jitter attenuator with advanced reference clock selection and hitless switching capabilities designed to meet the stringent requirements of communications infrastructure applications.

Features

BAW APLL with 40 fs RMS jitter at 491.52 MHz.
Three high-performance digital phase locked loops (DPLLs) with paired analog phase locked loops (APLLs).
Programmable DPLL loop bandwidth from 0.01 Hz to 4 kHz.
-116 dBc/Hz at 100 Hz offset at 122.88 MHz DPLL TDC noise with ≥ 20 MHz TDC rate.
Two differential or single-ended DPLL inputs.
1 Hz to 800 MHz differential.
Hitless switching with phase cancellation and/or phase slew control.

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Published: Dec 17, 2022 |