SN54LVTH18504A
SN54LVTH18504A is 3.3-V ABT SCAN TEST DEVICES manufactured by Texas Instruments.
description
The ’LVTH18504A and ’LVTH182504A scan test devices with 20-bit universal bus transceivers are members of the Texas Instruments (TI) SCOPE testability integrated-circuit family. This family of devices supports IEEE Std 1149.1-1990 boundary scan to facilitate testing of plex circuit-board assemblies. Scan access to the test circuitry is acplished via the 4-wire test access port (TAP) interface.
Additionally, these devices are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
In the normal mode, these devices are 20-bit universal bus transceivers that bine D-type latches and D-type flip-flops to allow data flow in transparent, latched, or clocked modes. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self-test on the boundary-test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPE universal bus transceivers.
Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), clock-enable (CLKENAB and CLKENBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A-bus data is latched while CLKENAB is high and/or CLKAB is held at a static low or high logic level. Otherwise, if LEAB is low and CLKENAB is low, A-bus data is stored on a low-to-high transition of CLKAB. When OEAB is low, the B outputs are active. When OEAB is high,...
