SN55LVDS32-SP Description
The SN55LVDS32 is a differential line receiver that implements the of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four differential receivers provides a valid logical output state with a ±100-mV...
SN55LVDS32-SP Key Features
- QML-V Qualified, SMD 5962-97621
- Operate From a Single 3.3-V Supply
- Designed for Signaling Rates of up to 100
- Differential Input Thresholds ±100 mV Max
- Typical Propagation Delay Times of 2.1 ns
- Power Dissipation 60 mW Typical Per Receiver
- Bus-Terminal ESD Protection Exceeds 8 kV
- Low-Voltage TTL (LVTTL) Logic Input Levels
- Open-Circuit Fail-Safe
- Cold Sparing for Space and High Reliability