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SN65LV1224 - 10:1 LVDS SERIALIZER/DESERIALIZER

Download the SN65LV1224 datasheet PDF. This datasheet also covers the SN65LV1023 variant, as both devices belong to the same 10:1 lvds serializer/deserializer family and are provided as variant models within a single manufacturer datasheet.

General Description

The SN65LV1023 serializer and SN65LV1224 deserializer comprise a 10-bit serdes chipset designed to transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 30 MHz to 66 MHz.

Key Features

  • 300-Mbps to 660-Mbps Serial LVDS Data Payload Bandwidth at 30-MHz to 66-MHz System Clock.
  • Pin-Compatible Superset of NSM DS92LV1023/DS92LV1224.
  • Chipset (Serializer/Deserializer) Power Consumption.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (SN65LV1023-etcTI.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
SN65LV1023/SN65LV1224 www.ti.