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SN65LV1224B-EP - 10:1 LVDS SERIALIZER/DESERIALIZER

This page provides the datasheet information for the SN65LV1224B-EP, a member of the SN65LV1023A-EP 10:1 LVDS SERIALIZER/DESERIALIZER family.

Description

The SN65LV1023A serializer and SN65LV1224B deserializer comprise a 10-bit serdes chipset designed to transmit and receive serial data over LVDS differential backplanes at equivalent parallel word rates from 10 MHz to 66 MHz.

Features

  • Controlled Baseline.
  • One Assembly/Test Site, One Fabrication Site.
  • Extended Temperature Performance of.
  • 55°C to 125°C.
  • Enhanced Diminishing Manufacturing Sources (DMS) Support.
  • Enhanced Product-Change Notification.
  • Qualification Pedigree (1) (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerat.

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Datasheet preview – SN65LV1224B-EP

Datasheet Details

Part number SN65LV1224B-EP
Manufacturer Texas Instruments
File Size 886.74 KB
Description 10:1 LVDS SERIALIZER/DESERIALIZER
Datasheet download datasheet SN65LV1224B-EP Datasheet
Additional preview pages of the SN65LV1224B-EP datasheet.

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Full PDF Text Transcription

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www.ti.com SN65LV1023A-EP SN65LV1224B-EP SGLS358 – SEPTEMBER 2006 10-MHz To 66-MHz, 10:1 LVDS SERIALIZER/DESERIALIZER FEATURES • Controlled Baseline – One Assembly/Test Site, One Fabrication Site • Extended Temperature Performance of –55°C to 125°C • Enhanced Diminishing Manufacturing Sources (DMS) Support • Enhanced Product-Change Notification • Qualification Pedigree (1) (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life.
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