SN65LVDS86A-Q1 Overview
The SN65LVDS86A FlatLink™ receiver contains three serial-in 7-bit parallel-out shift registers and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit. These functions allow receipt of synchronous data from a patible transmitter, such as the SN75LVDS81, '83, '84, or '85, over four balanced-pair conductors and expansion to 21 bits of single-ended low-voltage LVTTL synchronous...
SN65LVDS86A-Q1 Key Features
- 2 3:21 Data Channel Expansion at up to 178.5 Mbytes/s Throughput
- Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI
- Three Data Channels and Clock Low-Voltage Differential Channels In and 21 Data and Clock Low-Voltage TTL Channels Out
- Operates From a Single 3.3-V Supply
- Tolerates 4-kV Human-Body Model (HBM) ESD
- Packaged in Thin Shrink Small-Outline
- Consumes Less Than 1 mW When Disabled
- Wide Phase-Lock Input Frequency Range
- No External ponents Required for PLL
- Inputs Meet or Exceed the Standard