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SN65LVDS86A-Q1 - Receiver

Description

The SN65LVDS86A FlatLink™ receiver contains three serial-in 7-bit parallel-out shift registers and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit.

Features

  • 1.
  • 2 3:21 Data Channel Expansion at up to 178.5 Mbytes/s Throughput.
  • Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI.
  • Three Data Channels and Clock Low-Voltage Differential Channels In and 21 Data and Clock Low-Voltage TTL Channels Out.
  • Operates From a Single 3.3-V Supply.
  • Tolerates 4-kV Human-Body Model (HBM) ESD.
  • Packaged in Thin Shrink Small-Outline Package (TSSOP) With 20-Mil Terminal Pi.

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Full PDF Text Transcription

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SN65LVDS86A-Q1 www.ti.com SLLS768A – AUGUST 2006 – REVISED JANUARY 2012 FlatLink™ RECEIVER Check for Samples: SN65LVDS86A-Q1 FEATURES 1 •2 3:21 Data Channel Expansion at up to 178.5 Mbytes/s Throughput • Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to Display With Very Low EMI • Three Data Channels and Clock Low-Voltage Differential Channels In and 21 Data and Clock Low-Voltage TTL Channels Out • Operates From a Single 3.
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