SN65LVDS84AQ Datasheet | Texas Instruments

description The SN75LVDS84A and SN65LVDS84AQ Flat Link transmitters contains three 7-bit parallel-load serial-out shift registers, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits of single-ended LVTTL data to be synchronously transmitted over 3 balanced-pair conductors for receipt by a patible receiver, such as the SN75LVDS82 or SN75LVDS86/86A. When transmitting, data bits D0 - D20 are each loaded into registers of the ’LVDS84A upon the falling edge. The internal PLL is frequency-locked to CLKIN and then used to unload the data registers in 7-bit slices. The three serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers. The frequency of CLKOUT is the same as the input clock, CLKIN. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Flat Link is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright  2001, Texas Instruments Incorporated - POST OFFICE BOX 655303 DALLAS, TEXAS 75265 SN75LVDS84A, SN65LVDS84AQ...